Appendix J
DIFFERENCES IN 80X86 PROCESSORS

A PC may have any one of these processors to be classified as an IBM PC compatible: 8088, 8086, 80188, 80186, 80286, 80386, 80486, 80X86. From a general hardware point of view, the main difference between these processors is the size of the data bus, the size of the address bus, and the clock speed of the processor. From a software programmer’s point of view, the processors are very similar. The 8088 and the 8086 have the same instruction set. The 80188 and the 80186 have the same instruction set which includes all the 8086 instructions plus a few additional instructions. The 80286 executes all the same instructions that the 80186 executes plus more. The 80386 executes all the same instructions that the 80286 executes plus more. The 80486 executes all the same instructions that the 80386 executes plus more. (There are some exceptions to the backward compatible rules which a software programmer can use to identify which of the different processors the software is on.) This appendix discusses the primary differences between the processors from a general software application point of view.

ADDITIONAL 80186, 80188 INSTRUCTIONS

The PUSHA instruction to push all registers onto the stack along with the POPA instruction to pop all registers from the stack. An instruction to push an immediate data word onto the stack. An instruction to enter a procedure based on a compiler stack construct along with an instruction to leave a procedure based on a compiler stack construct. Instructions to shift and rotate using an immediate data value instead of a data value in the CX register. The BOUND instruction for the testing of a data value against an upper and a lower limit. An instruction for string input of port data along with an instruction for string output of port data.

ADDITIONAL 80286 INSTRUCTIONS

The 80286 offers a protected supervisor mode with associated special jumps, calls, and supervisor registers to support it. An interrupt instruction with immediate data. The 80286 has expanded memory addressing which is controlled with additional supervisor instructions and registers.

ADDITIONAL 80386 INSTRUCTIONS

The 80386 is a 32-bit processor with a backward compatible 16-bit mode. All the standard registers are expanded to 32-bit registers. There is also the addition of two new data segment registers: FS and GS. The instruction set is expanded to include support for all the new 32-bit registers. To reference a 32-bit register, put an E in front of the 16-bit reference. For example, EAX is the 32-bit register reference for the 16-bit register AX. The conditional jumps were expanded from 8-bit offsets to 16-bit offsets. A set of new bit handling instructions was included. A new instruction to set a byte value to zero or one depending on the current condition codes was included. There is a backward compatible 8086 mode that the 80386 provides. The virtual memory management hardware provided can access a very large address space depending on which particular version of the 80386 chip you are using.

ADDITIONAL 80486 INSTRUCTIONS

The XADD instruction to exchange and add is new. This instruction moves the destination operand into the source location and adds the source operand to the destination operand, putting the result in the destination. The CMPXCHG instruction to compare and exchange is new. This instruction compares the accumulator to the destination operand. If they are equal, the source operand is loaded into the destination. If they are not equal, the destination is loaded into the accumulator. There are several system supervisor level instructions including cache control instructions, etc. The 80486DX chip has the 8087 processor functions included inside the chip hardware. The 80486SX chip does not have the 8087 processor functions included inside the chip hardware.