Appendix B
POCSAG PAGING FORMAT
POCSAG PAGING FORMAT
The POCSAG (Post Office Code Standardisation Advisory Group)
format consists of a 576-bit preamble and one or more batches of codewords. Each batch
comprises a 32-bit frame synchronization (FS) code and eight 64-bit address frames of two 32-bit address
or idle codewords each. Idle codewords are transmitted in the absence of an
address codeword to ensure that every frame has 64 bits.
Frame Synchronization
This is a unique reserved word that is used to identify the beginning of each batch.
Preamble
This consists of 576 bits of a 101010... pattern transmitted at various baud rates. The decoder uses the
preamble to determine if the data received is a POCSAG signal and for synchronization with the data
stream.
Batch Structure
A batch consists of a frame synchronization code followed by eight frames of two address codewords per
frame, i.e.16 address codewords per batch.
Address Codeword
The structure of an address codeword is as follows: The first bit (bit 1) is always a zero. Bit 2
through 19 are the address bits; the pager looks at these bits to find its own unique address codeword. Bits
20 and 21 are "source identifier bits".
These two bits have four combinations: 0,01,10,11, each of which is
used to provide information for four different paging sources (address one to address four). Bits 22 to 31
are check bits for automatic error correction and detection. The final bit (bit 32) is added to give even
parity so that the sum of all the bits must always be an even number for error code detection. Pre-coded
into the code plug of a pager are three bits which specify the frame location within each batch, from which
the pager's address is to be received; the decoder will look only at the codewords in this frame for its
address.
Battery-Saver Feature
Power is removed from the receiver during all frames other than the pre-coded one, thus extending pager
battery life.
Code Capacity
The combination of the code plug's three pre-coded frame location bits and the address codeword's 18
address bits provides over two million (221) different assignable codes.
Message Codewords
A message codeword
always starts with a "1" and always follows directly after the address. Each message codeword replaces an
address codeword in the batch. Message codewords continue until terminated by the transmission of the
next address codeword, idle codeword or the end of transmission, i.e. the framing rules used in address
codewords do not apply to a message.
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Table of Contents ||
Chapter 1 ||
Chapter 2 ||
Chapter 3 ||
Chapter 4 ||
Chapter 5 ||
Chapter 6 ||
Chapter 7 ||
Appendix A ||
Appendix C ||
Glossary
Copyright 1995, 1996 Motorola, Inc. All Rights Reserved.
Last updated: June 5, 1996